1. Field of the Invention
The present invention relates to a thin film transistor and, more particularly, to a thin film transistor which is improved not to have capacitances between a gate electrode and source and drain electrodes.
2. Description of the Related Art
Thin film transistors (TFTS) include inverted-stagger, stagger, inverted-coplanar, coplanar transistors.
FIG. 1 shows a conventional thin film transistor, and, in this case, inverted-stagger transistor. In FIG. 1, reference numeral 1 denotes a substrate made of glass or the like, and a gate electrode 2 made of a metal such as Cr is formed on the substrate 1. Reference numeral 3 denotes a gate insulating film made of SiN or the like formed on the gate electrode 2 throughout the entire surface of the substrate 1, and reference numeral 4 denotes an i-type a-Si semiconductor layer formed on the gate insulating film 3. The i-type semiconductor layer 4 is opposite to the gate electrode 2 through the gate insulating film 3. Reference numeral 5 denotes n.sup.+ -type a-Si semiconductor layers formed on the i-type semiconductor layer 4, and the n-type semiconductor layers 5 are formed to vertically oppose the gate electrode 2 and separated from each other on a channel portion. Reference numerals 6 and 7 denote source and drain electrodes made of a metal such as Cr and formed on the n-type semiconductor layers 5. The source and drain electrodes 6 and 7 are formed to have the same pattern as those of the n-type semiconductor layers 5 and connected to the i-type semiconductor layer 4 through the n-type semiconductor layers 5. Note that this thin film transistor is used as a pixel electrode selection switching element of a TFT active matrix liquid crystal display element. When the thin film transistor is employed to the TFT active matrix liquid crystal display element, the gate electrode 2 of the thin film transistor is connected to a gate line (scanning line), and the drain and source electrodes 7 and 6 are connected to a data line and a pixel electrode, respectively.
In the above thin film transistor, however, since the source and drain electrode 6 and 7 are vertically opposite to the gate electrode 2 through the n-type and i-type semiconductor layers 5 and 4 and the gate insulating film 3, respectively, large capacitances C.sub.GS and C.sub.GD are generated between the gate electrode 2 and the source electrode 6 and between the gate electrode 2 and the drain electrode 7.
For this reason, when the thin film transistor is used as, e.g., a pixel electrode selection switching element of a TFT active matrix liquid crystal display element, a voltage is applied from the data line to the pixel electrode when the thin transistor is turned on upon application of a gate voltage. When the thin film transistor is turned off, this voltage is immediately distributed in accordance with a rate of the gate-source capacitance (C.sub.GS) to the liquid crystal capacitance (C.sub.LC). For this reason, since the voltage at the pixel electrode is decreased lower than the data voltage, display characteristics during a one-frame period until the next pixel electrode is selected are degraded.